CHIS=0, ICRST=0, CHIE=0, DMA=0, CHF=0, TRIGMODE=0
Channel (n) Status And Control
DMA | DMA Enable 0 (0): Disable DMA transfers. 1 (1): Enable DMA transfers. |
ICRST | FTM counter reset by the selected input capture event. 0 (0): FTM counter is not reset when the selected channel (n) input event is detected. 1 (1): FTM counter is reset when the selected channel (n) input event is detected. |
ELSA | Channel (n) Edge or Level Select |
ELSB | Channel (n) Edge or Level Select |
MSA | Channel (n) Mode Select |
MSB | Channel (n) Mode Select |
CHIE | Channel (n) Interrupt Enable 0 (0): Disable channel (n) interrupt. Use software polling. 1 (1): Enable channel (n) interrupt. |
CHF | Channel (n) Flag 0 (0): No channel (n) event has occurred. 1 (1): A channel (n) event has occurred. |
TRIGMODE | Trigger mode control 0 (0): Channel outputs will generate the normal PWM outputs without generating a pulse. 1 (1): If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle. |
CHIS | Channel (n) Input State 0 (0): The channel (n) input is zero. 1 (1): The channel (n) input is one. |